Topné součásti rezistu pro extrémní UV (EUV)

Mon, 01 Jun 2026 18:12:39 +0800

Out on the lithography floor, EUV exposure pushes the thermal budget of every photoresist layer right to the edge. A temperature drift of more than ±0.5°C during soft bake or hard bake is enough to miss critical dimension (CD) targets, print defects, and throw away wafers that already carry hours of front-end process history. Those heater parts feeding the bake steps aren’t accessories. They’re process control nodes, pure and simple. What matters, technically EUV resist heaters have to deliver wafer-level thermal uniformity of ±0.1°C across the resist surface, because line-width control is thermally coupled to the bake profile. We get there by pairing short-wave and medium-wave NIR elements with the photoresist absorption spectrum, while a quartz-halogen design gives stable, fast-response heating with low particulate operation. The system is built for cleanroom Class 1–100, with zero particle generation verified by in-situ monitoring and a sealed hot-zone geometry that keeps outgassing from contaminating the wafer. Repeatability is baked into the control loop: setpoint stability holds up under 24/7 duty, keeping unplanned downtime out of high-mix lot schedules. Why does this work in EUV lithography? Because the bake step sets resist flow, drives out residual solvent, and defines etch selectivity downstream. Tight temperature control translates directly into a tighter CD distribution, fewer rework lots, and predictable overlay. You keep the same process recipe across shifts without constant tuning, and you cut scrap that shows up later as etch bias from thermal non-uniformity. Energy use stays under control, too—the heater architecture targets the resist directly instead of heating the chamber walls. A few practical notes. These heater parts drop into standard resist tracks, but the thermal interface—block flatness and contact pressure—has to meet the specified tolerances. Run a short qualification to verify the temperature profile against your wafer stack, especially with thick resist or new underlayers. Once the interface is dialed in, the unit will run for thousands of cycles with nothing more than routine preventive checks.

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Topné součásti rezistu pro extrémní UV (EUV)